1. Field of the Invention
The present invention relates to a sampling switch used for an analog signal processing, specifically to a sampling switch capable of reducing a distortion in a signal wave form caused by a variation of on-resistance thereof being unaffected by a fluctuation of the input voltage thereto.
2. Description of the Related Art
Sampling switches are widely used for the analog signal processing such as a sample hold circuit, a switched capacitor circuit and an analog-to-digital (“A/D” hereinafter) converter. An important property of such a switch used in the signal path for an analog signal is that the on-resistance thereof does not cause a distortion in the signal wave form. For example, if a signal wave form is deformed by a sampling switch sampling an analog signal in an A/D converter, that is, if the wave form of the input signal is changed from that of an input signal, the conversion characteristics of the A/D converter will be impaired.
FIG. 1 shows a MOS transistor as a first conventional example of sampling switch. While the MOS transistor is widely used for switches, an on-resistance value thereof in the on-state depends on a voltage between the gate and source (voltage between the gate and drain), and a voltage between the substrate and the source.
Generally, a control voltage φ and a substrate terminal voltage applied to the gate terminal are constant independent of an input signal voltage, and the on-resistance of a switch changes depending on the input signal voltage. A delay time of the input signal going through a switch is in a close relation with a time constant which is determined by the on-resistance of the switch and a capacitance of the load, and a delay time of the output signal changes in accordance with the input signal voltage when the on-resistance of the switch depends on the input signal voltage.
This makes a wave form of the output signal in passage through the switch changed from that of the input signal prior to the passage. Lowering the operating voltage of a circuit and a high speed signal processing have a more significant impact on the input signal voltage. And it is required a technology for overcoming the above described problem.
A MOS transistor switch utilizing a bootstrap circuit is known as a technique for avoiding distortion to a signal by maintaining the on-resistance of a sampling switch constant. FIG. 2 shows a second example of such conventional sampling switch, which is seen in the following reference document.
[Non-patent document 1] A. M. Abo, P. R. Gray: A 1.5-V, 10-bit, 14.3 MS/s CMOS Pipeline Analog-to-Digital Converter, IEEE J. Solid-State Circuits, vol. 34, no. 5, pp. 599–606, May 1999
In FIG. 2, the fundamental switch is a transistor 100 whose source terminal is applied by the input voltage Vin and the voltage Vout is outputted from the drain terminal. All the other part thereof is a control circuit. When the transistor 100 is in a turned-on state in this circuit, the operation is such that a voltage between the gate and source of the transistor 100 is kept constant, thereby reducing a dependency of the on-resistance on the input signal voltage and a distortion of the signal induced by the sampling switch.
That is, the electrostatic capacity 101 is charged by the supply source voltage Vdd when the transistor 100 is not turned on. A switching control signal, φ, is low at this time. When the switching control signal φ is turned to high from low, a transistor 103 is turned off from -on and a transistor 104 is turned on from -off. This causes a transistor 105 to be turned on, the gate voltage of the transistors 100 and 102 become a charged voltage of the capacitance 101, i.e., a voltage basically determined by the supply source voltage Vdd, and the transistors 100 and 102 become turned on. The voltage between the gate and source of the transistor 100 is maintained approximately at the supply source voltage, Vdd.
In the second example of a conventional technique, however, since the output signal outputted from the drain terminal of the transistor 100 is delayed relative to the input signal, voltages at the source terminal and the drain terminal cannot necessarily be considered to change in the same fashion when the input signals change in high speeds. Because a transistor in conduction is regarded as a continuous resistor, the voltage at each part of the channel falls into an approximately intermediate value between the source terminal and drain terminal voltages, and therefore the average voltage in channels becomes an average between the source terminal and drain terminal voltages.
Therefore, although it may be considered that maintaining the gate terminal voltage constant in accordance with the average between the source and drain terminal voltages should suppress a variation of the on-resistance of a transistor to a small value, keeping the voltage between the gate and source unilaterally allows the voltage between the gate and drain to fluctuate in great deal as indicated in the second example of a conventional technique shown by FIG. 2, thus leaving a problem of causing a large distortion added to the signal unresolved. In the meantime, while the on-resistance of a transistor depends on the voltage between the substrate and the source, the problem of reducing a distortion cannot be accomplished by this control because the substrate voltage is actually considered to be maintained at a fixed potential in the second example of a conventional technique shown in FIG. 2.
Such a conventional technique of controlling the gate voltage by using a bootstrap circuit is described in a patent document below, the technique of which has not solved the same problem as with the second example of a conventional technique, however.
[Patent document 1] Japanese patent laid-open application publication 5-151795, “Dynamic input sampling switch used for CDAC”
FIG. 3 shows a sampling switch circuit of a third example of a conventional technique. This circuit is described in the following non-patent document.
[Non-patent document 2] M. Waltari, L. Sumanen, T. Korhonen, K. Halonen: A Self-Calibrated Pipeline ADC with 200 MHz IF-Sampling Frontend, ISSC Digest of Technical Papers, 18.5, February 2002
In the circuit shown by FIG. 3, the fundamental switch is a transistor 100. With the transistor 100 at the center, the same circuit as the control circuit shown in FIG. 2 is featured on both the right and left side thereof. The reason for featuring the circuit on the right is for controlling the substrate terminal voltage of the transistor 100. In this circuit, controlling the substrate voltage of the transistor 100 during its turn-on period by the output signal voltage can reduce a distortion of the signal induced by the switch.
In FIG. 3, a gate voltage control is performed by a bootstrap circuit in accordance with the input voltage Vin and the output voltage Vout in both the right and left circuits. The left circuit is operated so as to raise the gate voltage from the input voltage by a charged voltage of the capacitance 101 on the left, while the right circuit is likewise operated so as to raise the gate voltage from the output voltage Vout by a charged voltage of the capacitance 101 on the right. This seemingly controls the gate voltage evenly by the input and output voltage for the transistor 100, that is, by an intermediate voltage between Vin and Vout, thereby further reducing a distortion induced by the switch.
However, as for controlling a voltage between the substrate and source, a substrate terminal voltage control is performed only by the output signal voltage, leaving the unsolved problem of a small effect on reducing a distortion of signal as compared to a control by the intermediate voltage between the input signal and output signal voltages. Furthermore, the third example of a conventional technique requires the same circuitry of control circuit on both side of the transistor 100, i.e., the fundamental switch, causing a problem of larger circuit area.